1. Field of the Invention
The present invention relates to the field of safe and efficient system reconfiguration. More particularly, the invention relates to the hot plugging of a component into a powered receptacle.
2. Description of the Related Art
As computing technology gradually shifts towards the "network is the computer" paradigm, the need to be able to safely add/delete components of sub-systems of a computer network, i.e., of both individual computers and shared network resources, without a power down becomes increasingly important. The ability of each sub-system of the computer network to remain powered-up and responsive to the rest of the computer network enables the system to be maintained and upgraded while operational, thereby minimizing the down time of the network as a whole. This need is especially crucial in real-time mission-critical systems such as life-support systems and commercial banking systems.
FIG. 1 shows a conventional interconnect 1110 of a system 1100 for hot-plugging an interface 1210 of a component 1200. Interconnect 1110 includes precharge/ground connectors 1111a/b, and a plurality of signal connectors 1113a, 1113b, . . . 1113n. Similarly, interface 1210 includes precharge/ground connectors 1211a/b, and a plurality of signal connectors 1213a, 1213b, . . . 1213n.
Precharge connector 1211a protrudes along a mating edge of interface 1210 relative to signal connectors 1213a, 1213b, . . . 1213n. As a result, when interface 1210 mates with interconnect 1110, precharge connectors 1111a, 1211a mate prior to the engagement of the respective signal connectors. Since electrical signals travel at a much higher speed than mechanical components, it is presumed that by the time the respective signal connectors make contact, signal noise caused by a power-up of component 1200 has decayed to a harmless level.
Unfortunately, the conventional hot-plugging mechanism described above only precharges the circuitry on component 1200, thereby powering up daughter signal connectors 1213a, . . . 1213n in undetermined logic levels. Thus, when the mother and daughter signal connectors mate, mothers signal connectors 1113a, . . . 1113n, which can be at any one of three logic levels, high, low or transitioning, may be at inconsistent logic levels with respect to the corresponding daughter signal connectors 1213a, 1213b, . . . 1213n and may glitch. This is because the "capacitances" of the output/input drivers (not shown) of the respective daughter signal connectors 1213a, 1213b, . . . 1213n are uncharged prior to mating. If the resulting glitch(es) on the signal connectors are large enough, they may cause erroneous signals, i.e., signal noise, to propagate on system interconnect 1100.
As a result, the above-described conventional hot-plugging scheme is inflexible and is sensitive to the settling time of signals on signal connectors 1113a, 1113b, . . . 1113n, the (mechanical) rate at which component 1200 can be inserted into system 1100 and the signal clock speed of system 1100. Further, the conventional hot-plugging scheme exerts no control over any signals which may be present on interconnect 1110 during hot-plugging and/or hot-unplugging. For example, there is no provision for system 1100 to delay or slow activity on signal connectors 1113a, 1113b, . . . 1113n during hot-plugging/unplugging.
While it is possible to design drivers/receivers with enhanced noise immunity, at high system clock speeds, noise immunity becomes prohibitively difficult and/or expensive to achieve. Hence there is a need for a flexible and reliable noise-resistant hot-plugging/unplugging scheme that can be easily adapted to the requirements of different powered systems and components, e.g., different clock speeds and activity pattern, and can be easily implementable at low cost.